Virtual Labs

Electronics and Communication Engineering Digital Logic Design (Logic Gates & Mux-Demux) Experiments

Aim

Theory

Pretest

Procedure

Simulation

Posttest

References

Contributors

Feedback

Aim

Theory

Pretest

Procedure

Simulation

Posttest

References

Contributors

Feedback

Demultiplexer using basic logic gates.

Choose difficulty:

Beginner

Intermediate

Advanced

A demultiplexer is a ______________

a: data distributor/multi-position switch. Explanation

Explanation

b: combinational logic circuit. Explanation

Explanation

c: design alternative to sum-of-product solutions. Explanation

Explanation

d: All of these Explanation

Explanation

How many select lines are required for a 1:16 demux?

a: Two Explanation

Explanation

b: Four Explanation

Explanation

c: Five Explanation

Explanation

d: Eight Explanation

Explanation

Any n-variable truth table can be implemented using a universal logic circuit referred to a demultiplexer. State True or False.

a: True Explanation

Explanation

b: False Explanation

Explanation

c: Explanation

Explanation

d: Explanation

Explanation

The enable input in a demultiplexer is also referred to as________

a: decode input Explanation

Explanation

b: strobe input Explanation

Explanation

c: Select input Explanation

Explanation

d: All of these Explanation

Explanation

Decoders can be referred to as:

a: 3:8 convertor Explanation

Explanation

b: 1 of 8 demux Explanation

Explanation

c: binary to octal decoder Explanation

Explanation

d: All of these Explanation

Explanation

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