Demultiplexer using universal logic gates.
The figure in image003, represents a ___________.
In figure image003, when control input A = 0,
In figure image003, when control input A = 1,
In figure image003, what value of A will result in Y0 = Y1=0?
Higher order demux/decoders can be built using lower order demux/decoders. State True or False.