Virtual Labs

Electronics and Communication Engineering Digital Logic Design (Logic Gates & Mux-Demux) Experiments

Aim

Theory

Pretest

Procedure

Simulation

Posttest

References

Contributors

Feedback

Aim

Theory

Pretest

Procedure

Simulation

Posttest

References

Contributors

Feedback

Multiplexers using Basic Logic Gates

Choose difficulty:

Beginner

Intermediate

Advanced

A multiplexer is a ___________

a: data selector/multi-position switch. Explanation

Explanation

b: parallel to serial converter. Explanation

Explanation

c: design alternative to sum-of-product solutions. Explanation

Explanation

d: All of these Explanation

Explanation

How many select lines are required for a 32: 1 Mux?

a: Two Explanation

Explanation

b: Four Explanation

Explanation

c: Five Explanation

Explanation

d: Eight Explanation

Explanation

Any n-variable truth table can be implemented using a universal logic circuit referred to as multiplexer. State True or False.

a: True Explanation

Explanation

b: False Explanation

Explanation

c: spring-mass system Explanation

Explanation

d: fluid pressure Explanation

Explanation

The enable input in a multiplexer is also referred to as________

a: decode input Explanation

Explanation

b: strobe input Explanation

Explanation

c: Select input Explanation

Explanation

d: All of these Explanation

Explanation

For the circuit shown below, input S1 = 1, S0 = 0, then the output is_____

a: Y = 0 Explanation

Explanation

b: Y = 1 Explanation

Explanation

c: Y - X Explanation

Explanation

d: None of these Explanation

Explanation

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